| Title | Switch-Level Timing Simulation of MOS VLSI Circuits |
|---|---|
| Author | Vasant B. Rao, David V. Overhauser, Timothy N. Trick, Ibrahim N. Hajj |
| Year | 1989 |
| Edition | 1 |
| Volume | |
| Series | VLSI, Computer Architecture, and Digital Signal Processing |
| Publisher | Springer, Berlin |
| City | |
| Language | English |
Size: 1.2MB | Pages: 155 |
LLC: N/A | DDC: 621.381/73/0724
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